„Parallel VLSI Architecture“
Suchergebnisse
20 Treffer
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Flexible VLSI Architectures for the Iterative Decoding of Parallel Concatenated Convolutional Codes
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Probabilistic image models and their massively parallel architectures – a seamless simulation- and VLSI design framework approach
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Design of a data layout and memory access abstraction layer for heterogeneous architectures
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Low Cost and High Throughput VLSI Architectures of Folded and Parallel Sorters
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Motion Estimation for Video Coding – Efficient Algorithms and Architectures
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Turbo Decoder Architecture for Beyond-4G Applications
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Efficient VLSI architectures for bit parallel computation in Galios [Galois] fields
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A new VLSI algorithm and architecture for the hardware implementation of type IV discrete cosine transform using a pseudo-band correlation structure
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Parallel VLSI architectures for real-time kinematics of redundant robots
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An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture
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From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
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Algorithms and parallel VLSI architectures II – proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991
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Algorithms and parallel VLSI architectures
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VLSI: algorithms and architectures – proceedings of the International Workshop on Parallel Computing and VLSI, Amalfi, Italy, May 23 - 25, 1984
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A Parallel-Based Lifting Algorithm and VLSI architecture for DWT
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The instruction systolic array, a parallel architecture for VLSI
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Probabilistic image models and their massively parallel architectures – a seamless simulation- and VLSI design framework approach