„Floating point computer architecture“
Suchergebnisse
17 Treffer
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Application of ameliorated Harris Hawks optimizer for designing of low-power signed floating-point MAC architecture
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08021 Summary – Numerical Validation in Current Hardware Architectures
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08021 Abstracts Collection – Numerical Validation in Current Hardware Architectures
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PESA: error sensitivity analysis tool for floating-point computational programs
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On the use of the Infinity Computer architecture to set up a dynamic precision floating-point arithmetic
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Formal Verification of Floating-Point Hardware Design – A Mathematical Approach
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Formal Verification of Floating-Point Hardware Design – A Mathematical Approach
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Computer Arithmetic – Algorithms and Hardware Implementations
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Analysis and efficient implementation of IEEE-754 decimal floating point adders/subtractors in FPGAs for DPD and BID encoding
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Hierarchical search algorithm for error detection in floating-point arithmetic expressions
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Design of Flexible Floating Point Processing Element (FFPPE) Architecture Based on Golay Code Strategy
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Novel optimized low power design of single-precision floating-point adder using Quantum-dot Cellular Automata
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A method to convert floating to fixed-point EKF-SLAM for embedded robotics
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Implementation of multi-precision floating point divider for high speed signal processing applications
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Efficient implementation of space–time adaptive processing for adaptive weights calculation based on floating point FPGAs
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Computer Arithmetic – Algorithms and Hardware Implementations
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Computer arithmetic – algorithms and hardware implementations